Hardware Design and the Fairness of a Neural Network
Examines how hardware design choices can change population-level model performance.
Featured Peer-Reviewed Work
Selected work on how model and hardware choices influence efficiency and performance consistency across populations.
FairQuantize
Studies fairness-aware weight quantization for dermatological disease diagnosis.
Non-Ideal In-Memory Computing Hardware
Evaluates how hardware non-idealities affect group-wise performance in deep neural networks.
Research
I study efficiency and population-level model performance as coupled design objectives across algorithms, hardware, and deployment systems.
Hardware–AI co-design for consistent performance
I study how numerical precision, accelerator design, and device non-idealities change model behavior across population groups. The objective is to make population-level performance an explicit part of hardware–model co-design alongside accuracy, latency, and energy.
Fairness-aware model compression
I develop quantization and low-rank factorization methods that improve efficiency while accounting for disparities in group-wise performance, rather than optimizing aggregate accuracy and resource cost alone.
Efficient deployment and design foundations
I evaluate convolutional and large language models on CPUs and specialized accelerators, connecting model choices to compiler support, numerical precision, and deployment constraints. Earlier CNN-Cap work in electronic design automation established the hardware-design foundation for this systems perspective.
Selected Publications and Preprints
Google Scholar-
2025
FairLRF: Achieving Fairness through Sparse Low Rank Factorization
Preprint · arXiv:2511.16549, version 1 (2025).
-
2025
Improving the Fairness of Deep Neural Networks with Non-Ideal In-Memory Computing Hardware
Design, Automation & Test in Europe Conference (DATE).
- 2024
- 2024
-
2023
CNN-Cap: Effective Convolutional Neural Network-Based Capacitance Models for Interconnect Capacitance Extraction
ACM Transactions on Design Automation of Electronic Systems.
-
2021
CNN-Cap: Effective Convolutional Neural Network Based Capacitance Models for Full-Chip Parasitic Extraction
IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 1–9.
* Equal contribution.
Teaching and Mentoring
2026 Outstanding Graduate Student Teaching Award
University of Notre Dame
Award announcement
Spring 2025 & 2026
Advanced Computer Architecture — Teaching Assistant
Developed homework and final-exam materials, graded homework, quizzes, and exams, and held office hours across two course offerings.
Spring 2022
Computer Security — Teaching Assistant
Graded homework and examinations and held office hours for a remote course.
Fall 2021
Distributed Systems — Teaching Assistant
Graded homework, assisted with final-exam assessment, and held office hours.
Research mentoring
Mentored two high-school student researchers; the collaboration resulted in a published paper.
Selected Research and Systems Experience
May–Dec. 2025
Machine Learning Engineer (Internship), EdgeCortix
Independently set up, validated, and evaluated convolutional models and large language models on CPUs and Sakura accelerator cards in Dockerized environments. Used Python, PyTorch, Hugging Face, model quantization, and Docker, and supported compiler-team integration and validation tasks.
Oct. 2019–Jul. 2021
Undergraduate Researcher, Tsinghua University
Developed a machine-learning-based approach to interconnect capacitance extraction under Prof. Wenjian Yu. The project was supported by Tsinghua’s Undergraduate Innovation and Entrepreneurship Training Program and later contributed to two CNN-Cap publications.